Congratulations!
Our paper, titled “Flattening-based Mapping of Imperfect Loop Nests for CGRAs” by Jongeun Lee, Seongseok Seo, Hongsik Lee, and Hyeon Uk Sim, is accepted to this year’s CODES+ISSS (International Conference on Hardware-Software Codesign and System Synthesis).
CODES+ISSS is is a premier conference for embedded systems and hardware software co-design research, and held as part of ESWEEK (Embedded Systems Week) event, which also includes CASES (International Conference on Compilers, Architecture, and Synthesis for Embedded Systems) and EMSOFT (International Conference on Embedded Software), along with a host of workshops and symposia. Congratulations again to those who did the hard work!
Congratulations!
Our paper titled “Improving Performance of Loops on DIAM-based VLIW Architectures” in collaboration with SNU, was accepted for this year’s LCTES (Languages, Compilers, and Tools for Embedded Systems), a premiere conference on compilation for embedded systems. The conference will be held in Edinburgh, UK, in June.
Our first paper on runtime binary translation is accepted to the 21st Reconfigurable Architecture Workshop (RAW 2014), held in Phoenix, Arizona, May 19~20, 2014. The conference is associated with the 28th Annual International Parallel & Distributed Processing Symposium (IPDPS 2014). Congratulations to Toan and others who have contributed to this paper!
Yeonghun with Dongbu HiTek VP
Our paper titled “Selective Execution of Conditional Statements for CGRAs” by Yeonghun Jeong, Seongseok Seo, and Jongeun Lee is awarded Dongbu HiTek Best Paper Award today at the 21st Korean Conference on Semiconductors (KCS).
The Best Paper Award at KCS is very competitive and given to few select papers (about 10) out of 263 accepted papers/posters. With generous prize money, the award certainly carries a high prestige. 🙂
Congratulations again to those who co-authored the paper!
Yeonghun Jeong, Jongeun Lee, and Seongseok Seo, after the award ceremony.
The UNIST Graduate School will open its admissions for the 2014 KGSP from February 17th through March 21st, 2014.
The Korean Government Scholarship Program (KGSP) under Global Korea Scholarship (GKS) is sponsored by the National Institute for International Education (NIIED) and is designed to provide higher education in Korea for international students. The aim of this scholarship program is to promote international exchange in education and mutual friendship amongst the participating countries.
Timeline
- Application deadline: March 21st, 2014
- Document Review: March 25th ~ March 28th, 2014
- Interview: April 1st ~ April 7th, 2014
- Final Result Notification by NIIED: June 17th, 2014
- Entry to KOREA: August 25th ~ 27th, 2014
- NIIED Orientation: August 28th ~ 29th, 2014
- Korean Language Course or Graduate Program: Starting from September 1st, 2014
For further information, see this.
Position is available for UNIST undergraduate students seeking research opportunities.
Topics:
– Multicore architecture & compilation
– Application-specific processor design for System-on-Chip (SoC)
Contact Prof. Lee if interested.
Congratulations to Yeonghun and Seongseok,
Our paper titled “Evaluator-Executor Transformation for Efficient Pipelining of Loops with Conditionals” is accepted to ACM Transactions on Architecture and Code Optimizati
on. Authors will also be invited to HiPEAC 2014, Vienna, Austria. Congratulations again!
Tuesday July 9, we’ll have a lab meeting, where Seongseok will give a short presentation on stream applications.
Date: Wed, July 10 -> Tue, July 9
Time: 5 pm
Place: Room 511
Learning Processor-Generator
Automatic processor generation using a commercial state-of-the-art tool (Synopsys LISA tool)
Programming GPU
Machine Learning algorithm (HMM) on GPU (do something similar to: https://code.google.com/p/hmm-cuda/)
For further detail, please ask Prof. Lee at EB2 #501-5, or drop him a line.
In this year’s DATE (Design, Automation & Test in Europe), which is the largest European conference in the EDA (Electronic Design Automation) field, we have contributed two interactive presentation (IP) papers, which are published in 4 pages each and will appear in the IEEE Xplore as well. Congrats to those participants!
Here is the paper information (follow the links for full text).