ACM-Published Articles and Conference PapersNote: Free full-text download provided by ACM Author-izer, but there may be some delay between publication and its appearance on this page. Flattening-based mapping of imperfect loop nests for CGRAs
Jongeun Lee, Seongseok Seo, Hongsik Lee, Hyeon Uk Sim CODES '14 Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014 Improving performance of loops on DIAM-based VLIW architectures
Jinyong Lee, Jongwon Lee, Jongeun Lee, Yunheung Paek LCTES '14 Proceedings of the 2014 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems, 2014 Configurable range memory for effective data reuse on programmable accelerators
Jongeun Lee, Seongseok Seo, Jongkyung Paek, Kiyoung Choi ACM Transactions on Design Automation of Electronic Systems (TODAES), 2014 Software-based register file vulnerability reduction for embedded processors
Jongeun Lee, Aviral Shrivastava ACM Transactions on Embedded Computing Systems (TECS) - Special Section on ESTIMedia'10, 2013 Architecture customization of on-chip reconfigurable accelerators
Jonghee W. Yoon, Jongeun Lee, Sanghyun Park, Yongjoo Kim, Jinyong Lee, Yunheung Paek, Doosan Cho ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special Section on Networks on Chip: Architecture, Tools, and Methodologies, 2013 Improving performance of nested loops on reconfigurable array processors
Yongjoo Kim, Jongeun Lee, Toan X. Mai, Yunheung Paek ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers, 2012 Memory access optimization in compilation for coarse-grained reconfigurable architectures
Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunheung Paek ACM Transactions on Design Automation of Electronic Systems (TODAES), 2011 Cache vulnerability equations for protecting data in embedded processor caches from soft errors
Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul LCTES '10 Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems, 2010 Operation and data mapping for CGRAs with multi-bank memory
Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunheung Paek LCTES '10 Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems, 2010 A compiler optimization to reduce soft errors in register files
Jongeun Lee, Aviral Shrivastava LCTES '09 Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, 2009 Static analysis of processor stall cycle aggregation
Jongeun Lee, Aviral Shrivastava CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, 2008 Instruction set synthesis with efficient instruction encoding for configurable processors
Jong-Eun Lee, Kiyoung Choi, Nikil D. Dutt ACM Transactions on Design Automation of Electronic Systems (TODAES), 2007 Energy-efficient instruction set synthesis for application-specific processors
Jong-eun Lee, Kiyoung Choi, Nikil D. Dutt ISLPED '03 Proceedings of the 2003 international symposium on Low power electronics and design, 2003 An algorithm for mapping loops onto coarse-grained reconfigurable architectures
Jong-eun Lee, Kiyoung Choi, Nikil D. Dutt ACM SIGPLAN Notices - Special Issue: Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool support for embedded systems (San Diego, CA)., 2003 Efficient instruction encoding for automatic instruction set design of configurable ASIPs
Jong-eun Lee, Kiyoung Choi, Nikil Dutt ICCAD '02 Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design, 2002 Fast hardware-software coverification by optimistic execution of real processor
Sungjoo Yoo, Jong-Eun Lee, Jinyong Jung, Kyungseok Rha, Youngchul Cho, Kiyoung Choi DATE '00 Proceedings of the conference on Design, automation and test in Europe, 2000 |